1. Field of the Invention
The present invention relates to a dual antenna diversity transmitter and system and, more particularly, to a dual antenna diversity transmitter and system with high power amplifier efficiency.
2. Discussion of Related Art
A dual antenna diversity method is intended to overcome a fading phenomenon due to a multi-path phenomenon of a radio signal in a wireless propagation environment. It forms two radio signal paths un-correlated with each other on space or on antenna polarization through two antennas, and then receives a signal through the minimum fading path between them. Many wireless communication systems widely used in an indoor environment where the fading phenomenon is serious, such as a wireless LAN, use such a dual antenna diversity system.
Hereinafter, a conventional dual antenna diversity system will now be described with reference to FIGS. 1 to 3.
FIG. 1 is a block diagram illustrating a configuration of the conventional dual antenna diversity system, comprising two antennas 101 and 102 for forming radio signal paths un-correlated with each other on space or on antenna polarization with the identical antenna characteristics, diversity switches 103 and 104 for switching signals received by the two antennas, a power amplifier 105 for amplifying the power of a transmitting signal, two filters 106 and 107 for removing an unnecessary signal, transmitter/receiver circuits 108 and 109 for processing transmitting/receiving signals, and a base-band process circuit 110 for processing a base-band signal. The filters 106 and 107 may not be included in the system, and in this case, the transmitter/receiver circuits 108 and 109 may serve as filters 106 and 107. When transmitting the signal, the second switch 104 is switched to the first path to transfer the signal amplified at the power amplifier 105 to the second antenna 102. When receiving the signal, the second switch 104 is switched to the second path to selectively receive the minimum fading signal among the signals received by the first antenna 101 and the second antenna 102 through the first switch 103.
The power amplifier 105, which amplifies the inputted signal to a signal having extremely large power, is located between the transmitting antenna 102 and the transmitter circuit 108 in the wireless communication system, and generally has a structure that a number of transistors are combined in parallel to raise the output. As an indicator representing the performance of the power amplifier 105, the following Equation 1 defines power added efficiency (PAE) referred to as a ratio of the amplification power of the power amplifier 105 to the DC power that is inputted to the power amplifier 105 in the form of bias current and voltage.PAE=(output power−input power)/DC input power×100  [equation 1]
As illustrated above, the power amplifier 105 is composed of a number of transistors, whereby it has a problem that a bias current larger than that of a normal amplifier composed of a few transistors is always consumed. Moreover, most systems are required to maintain constant linearity, so that a bias point of the power amplifier is designed with Class AB. Accordingly, there is a problem that the inputted bias current increases with an increase of the output power of the power amplifier.
FIG. 2 is a diagram illustrating power added efficiency (PAE) according to an output power of the power amplifier. Referring to FIG. 2, the power added efficiency gradually increases as the output power increases, and the remaining range other than the maximum output power range shows extremely low power added efficiency. However, a wireless communication system is not always required to output the maximum power, but to output a suitable power level according to environment factors in which the system is operable, such as a distance between the transmitter and the receiver.
FIG. 3 is a diagram illustrating a distribution profile of occurrence probability depending on output power of a transmitting system of a cellular-band mobile communication terminal. FIG. 3 shows that the output power of the transmitting system has a very high probability of occurrence in a range of about −10 to 5 dBm, while it has a very low probability of occurrence in a range of 25 dBm or more being the maximum output power. Further, the probability of occurrence depending on the output power of the power amplifier consequentially has a similar distribution profile since the signal loss between the power amplifier and the transmitting antenna is low. Meanwhile, even in case of almost all of the wireless communication system including the mobile communication, it has probability distribution of occurrence similar to that. As such, the maximum probability of occurrence of the power amplifier is distributed in the intermediate output power range indicative of relatively low power added efficiency rather than the maximum output power range indicative of the maximum power added efficiency, thereby having a problem that the power amplifier is inefficiently operated during most duration of the use period of the power amplifier.
Hereinafter, a method of increasing the efficiency of the power amplifier according to the prior art will now be described with reference to FIGS. 4 and 5.
FIG. 4 is a block diagram illustrating a configuration of a transmitting unit employing a DC bias point control, which is one of methods for improving the power amplifier efficiency according to the prior art. In FIG. 4, the transmitting unit comprises a transmitter circuit 108, a power amplifier 105, a filter 107, an antenna 102, a power detector 121 for detecting the output power, and a bias point controller 122. Here, after the output power of the power amplifier 105 is detected by the power detector 121, a DC bias voltage or a DC bias current inputted to the power amplifier 105 is adjusted depending on the output power to control the bias point of the power amplifier 105. In other words, the amount of DC input power can be decreased in the range other than the maximum output power range of the power amplifier 105, by controlling an input amount of the DC bias voltage or the DC bias current inputted to the power amplifier 105 through the bias point controller 122 in proportion with a required output power, so that the power added efficiency of the power amplifier would be improved. The associated description has been provided in “Young-Kai Chen, Jenshan Lin, Linear Power Amplifier With Automatic Gate/Base Bias Control for Optimum Efficiency, U.S. Pat. No. 5,724,005, Mar. 3, 1998.”
However, the aforementioned method has a problem that the bias point of the power amplifier changes, and thus, the output matching condition is changed, resulting in aggravating the linearity of the power amplifier 105. Therefore, there should be a restriction to the amount of DC input power that is decreased by the control of the bias point controller, in order to meet the linearity specification required in the system. Thus, it has a problem that a degree of improving the power added efficiency is very little.
FIG. 5 is a block diagram illustrating a configuration of a power amplifier employing a second stage by-pass, which is one of methods for improving the power amplifier efficiency according to the prior art. In FIG. 5, the power amplifier comprises a first stage 124, a second stage 128, an input matching circuit 123 for forming a matching condition of the signal, an output matching circuit 129, an intermediate matching circuit 127, a bypass matching circuit 125, single-pole single-throw (SPST) switches 126, 130, and 132, and a switch controller 131. The power amplifier determines whether or not the second stage 128 needs to be bypassed according to the output power of the required power amplifier and then switches the signal. That is, in case where the high output power is required, the output signal of the first stage 124 is amplified to a signal through the first path with a higher power than the second stage 128, while closing switches 126 and 130 on the first path and opening switch 132 on the second path. Further, in case where the output power not so high as can be amplified only with the first stage 124 is required, a signal bypassing the second stage 128 through the second path is outputted by opening the switches 126 and 130 on the first path and closing the switch 132 on the second path. At this time, the DC bias power inputted at the second stage 128 is minimized to increase the power added efficiency of the power amplifier since the second stage 128 does not serve as an amplifier. The associated description has been provided in “R. Steven Brozovich, Wayne Kennan, High Efficiency Multiple Power Level Amplifier Circuit, U.S. Pat. No. 5,661,434, Aug. 26, 1998”.
However, in case that the output signal of the first stage 124 is switched to the second path, the output impedance condition of the first stage 124 and the input impedance condition of the filter (not shown) are mismatched each other to cause a reflection phenomenon of the signal. Thus, an additional matching circuit other than the existing matching circuit is required in order to block this reflection phenomenon. Further, the single-pole single-throw switches 126, 130, and 132 should be installed at the output of the first stage 124 and the second stage 128 and on the by-pass path, in order to make isolation between the first path and the second path. For this reason, the second stage by-pass has a problem that the structural configuration of the power amplifier becomes complicated. In addition, the switch and the bypass path should be configured on the signal path between the first stage 124 and the second stage 128 within the existing power amplifier circuit, so that it has a problem that this structure should be considered from when designing the power amplifier, and that it cannot be applied to the structure of the existing power amplifier.